Dolphin Design and CEA-List have formed a new joint R&D lab of embedded systems. Their goal is to achieve the best tradeoff for Edge AI devices between SW flexibility, energy efficiency, and peak performance. Specifically, CEA-List's PNeuro® hardware accelerator integrates AI into the computing platform developed in the joint lab, and is combined with the processing platform developed by Dolphin Design. Two CEA-List’s tools are involved, SESAM simulation environment that enables faster exploration and validation, and N2D2 code generator that facilitates programming.

With the exponential increase of connected devices, and migration of data to the cloud, the data deluge is a real impediment as it consumes a lot of time and power. For Edge-IoT, the current challenge is to drive the Decision Making as close as possible to the sensors, to reduce the amount of data exchanged with the Cloud and therefore improve overall Power Efficiency, data privacy and response time.

To do this, chip designers must embed AI computing in their chip to perform the decisions, and they must find inventive MCU architectures that minimize power consumption and maximize the device’s battery lifetime.

With this perspective, Dolphin Design comes with processing platforms to help face the data deluge challenge:

• CHAMELEON: innovative event-based MCU platform able to perform autonomously data collection and prefiltering without waking-up the power consuming MCU.
• RAPTOR: neural network accelerator platform for AI computing.
• A reduced featured version of Raptor - Mini Raptor – will power the high-end versions of Chameleon MCU platform featuring AI capabilities to increase the processing power at a fraction of the power consumption.

Both these platforms are delivered with software tools: drivers, tool suite and virtual platform.

To match their customers’ stringent Time-to-Market requirements, Dolphin Design has strengthened its developments by joining forces with the expert teams of CEA-List in a joint lab.

The joint lab will draw on both partners’ solutions and know-how to bring a flexible new computing platform, with AI capabilities, to the embedded electronics markets. Dolphin Design has integrated several hardware IP, developed by CEA-List, into its Chameleon and Raptor product portfolio. CEA-List researchers continue to deploy and expand their N2D2 deep learning platform to improve processing efficiency and reduce the power consumption of systems that integrate the PNeuro® hardware accelerator.

PNeuro® is a single instruction, multiple data (SIMD), low footprint, programmable accelerator from CEA-List that will enable Dolphin Design to add AI capabilities to the low power Chameleon and Raptor products. Chameleon is an event-based MCU subsystem platform embedding several standard peripherals, an autonomous DMA, a fined-grained power management unit and a PNeuro® with 32 processing elements. Raptor is a programmable hardware accelerator specialized in NN (Neural Network) inference and vision processing, which includes a host core, a DMA, and a PNeuro® with 128 processing elements. With Chameleon and Raptor, Dolphin Design will cover a wide range of AI low power applications.

Moreover, by expanding CEA-List’s N2D2 tool features to PNeuro® architecture support, CEA provide a powerful and independent deep neural network platform, dedicated to embedded applications design for Chameleon and Raptor product users. N2D2 is able to generate the optimized PNeuro® program directly from the user’s high-level neural network application and is compliant with the ONNX exchange format readily available in all major deep learning frameworks. It also integrates advanced quantization technics that fully leverage the lower-precision PNeuro® core to keep the best applicative performance with reduced circuit area and power footprint. For a complete interoperability of the Deep Learning models, developments are planned to improve the standard ONNX support in N2D2 in order to add it to the list of ONNX compliant Machine Learning frameworks to increase the market reach for Raptor and Chameleon with mini-Raptor.

Finally, by combining both CEA’s PNeuro® Virtual model and SESAM / VPSim Virtual prototyping tool, Dolphin Design can improve design quality, performance and reliability, explore designs faster, and start Software development earlier in the design process.

PNeuro® accelerator, N2D2 DNN framework and SESAM/VPSim Virtual prototyping tools significantly consolidate the differentiating position of Dolphin Design’s Chameleon and Raptor products by combining low power efficiency with area metrics and other tools to ease and improve Dolphin customers’ development times.

For 2021, the partners have set their sights on a demo chip build on 22 nm FDSOI technology, and a software generation flow that Dolphin Design’s customers can use to develop energy- and resource-efficient applications.

About Dolphin Design

Dolphin Design, a subsidiary of SOITEC, is a semiconductor company headquartered in France. They employ more than 180 people, including 140 highly qualified engineers.

They provide differentiating platform solutions built on state-of-the-art IPs and architectures, customized by unique system level utilities to deliver fast and secure ASICs, either designed by or for their clients. These platforms are available for various technological processes and optimized for Energy Efficient SoC Design.

By the side of their clients, now exceeding 600 companies, they focus on human, inventive and long-term collaboration to enable them to bring products and devices, powered by innovative and accessible integrated circuits that minimize environmental impact, to the hands of billions of people everyday. In consumer markets including IoT, AI and 5G, or in high reliability markets such as automotive, industrial or aerospace, they unleash SoC designer creativity to deliver differentiation.

Tell them your biggest dream. Dare the impossible. They tech it on.
For more information: www.dolphin-design.fr